AMX DESIGN XPRESS V 1.5 - PROGRAMMER GUIDE Guia do Utilizador descarregar pdf (Página 110)

110 www.xilinx.com Virtex-5 FPGA Integrated Endpoint Block

UG197 (v1.5) July 22, 2009

BAR

Base Address Register.

Beat

A clock cycle where both the source and destination are ready.

Completer

The device addressed by a request. It executes the completer

transaction.

Completion

A Packet used to terminate or partially terminate a transaction

sequence.

Configuration Space

One of the four address spaces within the PCI Express architecture

(the others are I/O, memory and message). Packets with a

Configuration Space address are used to configure a device.

CplD

Completion with Data. Used for memory, I/O, and configuration read

completions.

CRC

Cyclic redundancy check. A method of error detection. A number is

calculated from the data being transmitted, and is sent along with the

data. The number is re-calculated at the destination and compared to

the transmitted value.

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AMX DESIGN XPRESS V 1.5 - PROGRAMMER GUIDE Guia do Utilizador Página 110